CPU efficient networking stack using NIC memoryNIC 메모리를 활용한 네트워킹 스택의 효과적인 CPU 자원 관리

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CPU speed has stalled while network speed has been growing exponentially. This imbalance of speed improvements makes the host CPU the bottleneck. To alleviate it, many studies in the network field have been conducted to reduce the CPU burden. We cluster the previous works into the following three main categories based on the approaches: (1) to reduce CPU usage by implementing a networking stack on NIC, (2) to eliminate payload copy, and (3) to optimize the networking stack. Each method, however, has its own drawbacks. (1) The hardware-implemented networking stacks leave little room for modification. (2) Many zero-copy methods require application modification. Further, the application must ensure that the application buffer is not modified for a long time. (3) Copy operation still remains regardless of networking stack optimizations. In this work, we redesign the networking stack to keep the socket buffer in the NIC memory while keeping the socket APIs intact to overcome the mentioned limitations. (1) This work performs the network protocol processing based on the CPU to maintain development flexibility. (2) The application quickly reuses its own buffer, since the socket buffer exists in the NIC memory, unlike the existing zero-copy methods. Further, our work does not require application modification since we keep the socket APIs intact. (3) The NIC DMA module transfers the application buffer to NIC memory without using the host CPU, eliminating CPU-based copy. Our I/O method reduces CPU usage by up to 70.2% compared to the CPU-based memory copy I/O scheme. The TCP stack implemented on top of our work reduces the application buffer holding time by 1.7x $\sim$ 4.9x depending on the buffer size compared to the user buffer direct I/O scheme.
Advisors
Moon, Sueresearcher문수복researcher
Description
한국과학기술원 :전산학부,
Publisher
한국과학기술원
Issue Date
2023
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전산학부, 2023.2,[iv, 33 p. :]

Keywords

CPU▼aDMA▼aNIC▼aprotocol processing flexibility▼ano CPU-based copy▼abuffer holding time▼ano application modification; CPU▼aDMA▼a네트워크 인터페이스 카드▼a프로토콜 유연성▼aCPU기반의 복사 제거▼a버퍼 유지 시간▼a응용 코드 유지

URI
http://hdl.handle.net/10203/309527
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1032956&flag=dissertation
Appears in Collection
CS-Theses_Master(석사논문)
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