A high-speed pattern decoder in MPEG-4 padding block hardware accelerator

Publisher
IEEE
Issue Date
2001-05-06
Language
ENG
Description

ISCAS.2001 May

Citation

IEEE International Symposium on Circuits and Systems (ISCAS 2001), v.2

ISSN
0271-4310
URI
http://hdl.handle.net/10203/297
Appears in Collection
EE-Conference Papers(학술회의논문)
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