Design of a large-scale storage-class RRAM system

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Resistive Random Access Memory (RRAM) is a promising next generation non-volatile memory (NVM) technology, thanks to its performance potential, endurance and ease-of-integration with standard silicon CMOS processes. While prior work has evaluated RRAM as a replacement for DRAM or even cache memory, to our knowledge there is no prior study that has investigated whether RRAM could be a viable NAND flash replacement in building large-scale storage-class memory systems. Motivated by this observation, our paper first discusses and quantifies the main problems associated with RRAM that prevent it from replacing NAND flash. The main solution we propose, "slab-based memory access with local/global bitlines," enables dense RRAM islands but can also cause performance related problems. To compensate for the latter, we also propose exploiting internal resource parallelism in RRAM and employing optimized data movement interfaces. Our extensive experimental evaluation using a cycle-level NVM simulator and real workloads under diverse computing domains indicate that the proposed architecture can provide 2.95 ∼ 8.28 times better bandwidth and 66% ∼ 88% shorter latency as compared to the conventional NAND flash, and improve the system-level performance of our workloads by 5x, with a storage capacity similar to that of the state-of-the-art NAND flash. © 2013 ACM.
Publisher
ACM SIGARCH
Issue Date
2013-06-10
Language
English
Citation

27th ACM International Conference on Supercomputing, ICS 2013, pp.103 - 114

DOI
10.1145/2464996.2465004
URI
http://hdl.handle.net/10203/269692
Appears in Collection
EE-Conference Papers(학술회의논문)
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