(A) dynamic task scheduling scheme for hybrid SIFT-CNN deep learning model in FPGA-GPU edge computing environment

Abstract

Mobile Edge Computing is a network architecture concept that aims to move existing cloud infrastructure closer to users, it has a lower latency compared to the cloud by being located in the access network. With this feature, mobile edge computing enables new kinds of applications that were not possible in the cloud. In Smart Factory, a typical scenario where mobile edge computing can be applied, the applications often require analysis based on image recognition algorithm. We first proposed a SIFT-CNN model for image recognition. This model aims at maintaining high accuracy and improving processing speed of image recognition in mobile edge computing environment. In addition, this thesis deals with the problem of scheduling tasks related to image recognition energy-efficiently while satisfying processing time requirement in FPGA-GPU hybrid system. Various studies have been conducted to schedule tasks energy-efficiently in heterogeneous clusters. However, conventional studies apply the scheduling by just allocating the tasks to the clusters. In this thesis, we consider a task partition that divides a CNN task into several subtasks and assigns them into several accelerators. By applying the task partition, energy efficiency and throughput can be further improved by exploiting the differences in processing characteristics for each CNN layer on FPGA and GPU. Using this features, we proposed a dynamic partition scheduling scheme for CNN inference in FPGA-GPU hybrid system. Since this thesis aims at real-time service in edge computing environment, the scheduler adaptively schedules according to the amount of input task. As long as the processing time requirement of an input task is met, the scheduler maximizes energy efficiency by dynamically changing the scheduling. To verify the proposed scheme, we compared the proposed scheduling with the conventional task scheduling in the system composed of several FPGAs and GPUs through a simulator. Experimental results showed that about 48% improvement of energy efficiency was identified with comparison of the conventional schemes under the edge computing environment with 4 FPGAs and 2 GPUs.