Highly linear and efficient wideband CMOS RF power amplifier

Abstract

For highly linear and efficient wideband CMOS power amplifier for wireless communi-cations, effective linearization and wideband techniques are presented. To improve the line-arity of the PA, parallel-cascoded configuration (PCC) is proposed to cancel out third and fifth IMDs and third harmonic distortion due to drain current nonlinearity. This also reduces distortions due to nonlinear capacitances. The configuration allows the amplifier linear characteristics to be robust against gate node voltage variations of CG transistors. An active feedback linearizer (AFL) with a concept of negative feedback control is applied to improve AM-AM and the power-added efficiency (PAE) at high output powers. In addition, a dynamic feedback linearizer (DFL) with an enhanced feedback control method is proposed, which reduces AM-PM distortion as well as AM-AM distortion simultaneously. A dynamic bias linearizer (DBL) based on envelope voltage injection to the bodies of the common source (CS) and common gate (CG) power transistors is proposed instead of front-gate networks with complicated bias and matching networks. The linearizers allow the PA to have optimum AM-AM and AM-PM characteristics, which reduces the nonlinear distortions significantly. Furthermore, a highly linear and efficient wideband CMOS PA is proposed with a compact transformer. The proposed transformer at inter stage and output stage is composed of interdigitated structure which has a high magnetic coupling factor and passive efficiency, which enhances linearity and efficiency of PA at the band edge.