Digital signal processing algorithms for adaptive loop gain and frequency detection in Bang-Bang CDRBang-Bang 클럭-데이터 복원기에서의 루프이득 자동 조정 알고리즘과 주파수 획득 알고리즘 에 관한 연구

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As the operating speed of the CDR gradually increases, digital CDRs with high operation reliability are increasingly preferred. The complex signal processing capabilities of digital circuits can provide a variety of functions that conventional analog CDRs could not. This dissertation presents a digital signal processing method that extracts optimal loop gain of CDR and frequency of input data from BBPD output. We describe the concept and operation of a smart CDR that incorporates these algorithms and a loop filter. The proposed algorithms were measured with ICs fabricated at 40nm and 65nm, respectively.
Advisors
Bae, Hyeon-Minresearcher배현민researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2018
Identifier
325007
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학부, 2018.8,[iv, 47 p. :]

Keywords

transceiver▼aclock and data recovevery (CDR)▼aadaptive loop gain control▼afrequency detector▼aBang-Bang phase detector; 송수신기▼a클럭 및 데이터 복구▼a적응적 루프이득 제어▼a주파수 검출기▼aBang-Bang 위상검출기

URI
http://hdl.handle.net/10203/265209
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=867917&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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