(A) fast and accurate statistical eye-diagram estimation method considering non-linear power/ground noise and simultaneous switching output noise

Abstract

Recent technology trend requires TB/s bandwidth. To support this trend, data rate/pin in memories’ high-speed channels are continuously increasing. Therefore, to maintain TB/s bandwidth, maintaining signal integrity in the high-speed channel is mandatory. In the high-speed channel, not only channel parameters but also non-linear power/ground noise generated by simultaneous switching buffer outputs (SSOs) noise affect signal integrity. These noises are dominated by the occurrence probabilities of the SSO buffer combinations. However, conventional transient simulators and eye-diagram estimation methods fails to accurately estimate the eye-diagram considering these noise effects. Recent trends require signal/power integrity analysis in extremely low bit error rate (BER) level. In this thesis, analytical and statistical output response model which considers power/ground noise and SSO effects. A fast and accurate statistical eye-diagram estimation method using the derived output response PDFs based on response model is proposed and validated. Proposed statistical eye-diagram estimation method which considers the power/ground noise and previous bit patterns affected by the SSO effects is fast and accurate. Also proposed method can be used for BER analysis at very low BER. Proposed statistical eye-diagram estimation method is applied to signal and power integrity analysis in high-speed on interposer channel for 2.5D-Integrated circuit systems.