An area efficient approach to design self-timed cryptosystems combatting DPA attack

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Cryptosystems for smartcard are required to provide protection from Differential Power Analysis (DPA) attack. Self-timed circuit based cryptosystems demonstrate considerable resistance against DPA attack, but they take substantial circuit area. A novel approach offering up to 30% area reduction and maintaining DPA protection level close to DIMS scheme is proposed.
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Issue Date
2005-01
Language
English
Article Type
Letter
Keywords

SECURITY; CIRCUITS

Citation

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E88A, no.1, pp.331 - 333

ISSN
0916-8508
DOI
10.1093/ietfec/E88-A.1.331
URI
http://hdl.handle.net/10203/255887
Appears in Collection
GT-Journal Papers(저널논문)
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