Single-Cell Stateful Logic Using a Dual-Bit Memristor

Cited 37 time in webofscience Cited 18 time in scopus
  • Hit : 530
  • Download : 0
By combining the functions of Boolean gates and non-volatile memory, stateful logic may enable significant savings in time and energy for computational processes that can be performed directly in main memory and for data analyses in edge environments. A simple reduction to practice this concept is demonstrated by Borghetti et al. in 2010 via a material implication logic gate comprising two parallel memristors and a conditional write operation. Here, a single physical dual-bit memristor, possessing both bipolar and unipolar resistance switching characteristics and utilizing their operations, is demonstrated. This device responds to a conditional write to perform not only implication but multiple other logic functions when configured with a series resistor and addressed with a specific voltage pulse. The simple circuit structure of this dual-bit memristor allows compact sequential logic cascading along the time dimension without a concern of multiple cell accessing related issues. The sequence of implementing a full-adder is also discussed.
Publisher
WILEY-V C H VERLAG GMBH
Issue Date
2019-03
Language
English
Article Type
Article
Citation

PHYSICA STATUS SOLIDI-RAPID RESEARCH LETTERS, v.13, no.3

ISSN
1862-6254
DOI
10.1002/pssr.201800629
URI
http://hdl.handle.net/10203/254002
Appears in Collection
MS-Journal Papers(저널논문)
Files in This Item
There are no files associated with this item.
This item is cited by other documents in WoS
⊙ Detail Information in WoSⓡ Click to see webofscience_button
⊙ Cited 37 items in WoS Click to see citing articles in records_button

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0