DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shin, Gwang Hyuk | ko |
dc.contributor.author | Koo, Bondae | ko |
dc.contributor.author | Park, Hamin | ko |
dc.contributor.author | Woo, Youngjun | ko |
dc.contributor.author | Lee, Jae Eun | ko |
dc.contributor.author | Choi, Sung-Yool | ko |
dc.date.accessioned | 2018-12-20T08:04:59Z | - |
dc.date.available | 2018-12-20T08:04:59Z | - |
dc.date.created | 2018-10-26 | - |
dc.date.created | 2018-10-26 | - |
dc.date.created | 2018-10-26 | - |
dc.date.created | 2018-10-26 | - |
dc.date.issued | 2018-11 | - |
dc.identifier.citation | ACS APPLIED MATERIALS & INTERFACES, v.10, no.46, pp.40212 - 40218 | - |
dc.identifier.issn | 1944-8244 | - |
dc.identifier.uri | http://hdl.handle.net/10203/248746 | - |
dc.description.abstract | We present a tunneling field-effect transistor based on a vertical heterostructure of highly p-doped silicon and n-type MoS2. The resulting p-n heterojunction shows a staggered band alignment in which the quantum mechanical band-to-band tunneling probability is enhanced. The device functions in both tunneling transistor and conventional transistor modes, depending on whether the p-n junction is forward or reverse biased, and exhibits a minimum subthreshold swing of 15 mV/dec, an average of 77 mV/dec for four decades of the drain current, a high on/off current ratio of approximately 107 at a drain voltage of 1 V, and fully suppressed ambipolar behavior. Furthermore, low-temperature electrical measurements demonstrated that both trap-assisted and band-to-band tunneling contribute to the drain current. The presence of traps was attributed to defects within the interfacial oxide between silicon and MoS2. © 2018 American Chemical Society. | - |
dc.language | English | - |
dc.publisher | AMER CHEMICAL SOC | - |
dc.title | Vertical-Tunnel Field-Effect Transistor Based on a Silicon–MoS2 Three-Dimensional–Two-Dimensional Heterostructure | - |
dc.type | Article | - |
dc.identifier.wosid | 000451496000088 | - |
dc.identifier.scopusid | 2-s2.0-85056520141 | - |
dc.type.rims | ART | - |
dc.citation.volume | 10 | - |
dc.citation.issue | 46 | - |
dc.citation.beginningpage | 40212 | - |
dc.citation.endingpage | 40218 | - |
dc.citation.publicationname | ACS APPLIED MATERIALS & INTERFACES | - |
dc.identifier.doi | 10.1021/acsami.8b11396 | - |
dc.contributor.localauthor | Choi, Sung-Yool | - |
dc.contributor.nonIdAuthor | Koo, Bondae | - |
dc.contributor.nonIdAuthor | Woo, Youngjun | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | tunneling transistor | - |
dc.subject.keywordAuthor | heterostructure | - |
dc.subject.keywordAuthor | MoS2 | - |
dc.subject.keywordAuthor | silicon | - |
dc.subject.keywordAuthor | steep-slope device | - |
dc.subject.keywordPlus | HIGH-MOBILITY | - |
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