Rigorous mathematical model of through-silicon via capacitance

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Through-silicon vias (TSVs) are a key technology for three-dimensional integrated circuits. As the integration of circuits increases, high temperature has a greater effect on the performance of the TSV interconnections. The metal-oxide semiconductor (MOS) effect is one of the most important temperature-dependent characteristics of a TSV. This study introduces the mathematical model of a TSV to predict the MOS effect more accurately. The thermal effect that varies due to the change in the TSV capacitance and depletion region can be modelled by the non-linear the Poisson equation including mobile charge carriers. In procedures to solve this equation, the proposed method considers not only the thermal effect of intrinsic carrier concentration and silicon bandgap energy but also the shift effect of the flat band voltage due to the Si-SiO2 interface charges. In addition, since it considers the minority carrier generation rate, which is dependent on the change of gate voltage, the MOS effect in a TSV can be explained more accurately using equations derived from these procedures. To verify the proposed mathematical model, comparison with the numerical method is carried out, and these results show that the proposed method is very accurate in explaining the MOS effect in a TSV.
Publisher
INST ENGINEERING TECHNOLOGY-IET
Issue Date
2018-09
Language
English
Article Type
Article
Keywords

VIAS; TSV

Citation

IET CIRCUITS DEVICES & SYSTEMS, v.12, no.5, pp.589 - 593

ISSN
1751-858X
DOI
10.1049/iet-cds.2017.0157
URI
http://hdl.handle.net/10203/245651
Appears in Collection
GT-Journal Papers(저널논문)
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