2X Super-Resolution Hardware Using Edge-Orientation-Based Linear Mapping for Real-Time 4K UHD 60 fps Video Applications

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Based On our previous super-interpolation method, we propose a novel hardware-friendly super-resolution (SR) algorithm, called HSI method, and its dedicated hardware architecture for up-scaling full-high-definition (FHD) video streams to 4K ultra-high-definition (UHD) video streams in real-time. Our proposed HSI method involves training and up-scaling steps. In the training step, an edge-orientation-based clustering is applied for low-resolution (LR) training patches to obtain a training patch set for each class, and a linear mapping kernel is learned from LR to high-resolution (HR) based on the training patch set for each class. In the up-scaling step, each LR input patch is transformed to an HR patch by applying the linear mapping kernel for its class. We implemented the up-scaling step of our HSI method by a dedicated hardware (HW) with the pre-trained linear mapping kernels stored in a look-up table. Our HW implementation, called HSI HW, contains 159K gate counts and achieves about 880 Mpixels/s throughput by using the TSMC 0.13-um CMOS process, and thus performing the SR operation from FHD to 4K UHD in real-time. Compared with conventional SR methods, our HVV implementation of HSI reconstructs HR images of higher peak signal to noise ratio values and better visual quality.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2018-09
Language
English
Article Type
Article
Citation

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.9, pp.1274 - 1278

ISSN
1549-7747
DOI
10.1109/TCSII.2018.2799577
URI
http://hdl.handle.net/10203/245640
Appears in Collection
EE-Journal Papers(저널논문)
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