A 96.5% Efficiency Current Mode Hysteretic Buck Converter with 1.2% Error Auto-Selectable Frequency Locking

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dc.contributor.authorSeo, Jeong-Ilko
dc.contributor.authorLim, Baek-Minko
dc.contributor.authorLee, Sang-Gugko
dc.date.accessioned2018-08-20T07:46:45Z-
dc.date.available2018-08-20T07:46:45Z-
dc.date.created2017-11-29-
dc.date.created2017-11-29-
dc.date.issued2018-09-
dc.identifier.citationIEEE TRANSACTIONS ON POWER ELECTRONICS, v.33, no.9, pp.7733 - 7743-
dc.identifier.issn0885-8993-
dc.identifier.urihttp://hdl.handle.net/10203/244805-
dc.description.abstractThis paper proposes a current mode hysteretic buck converter with auto-selectable frequency locking. In this work, the hysteresis of the hysteretic comparator and the resistance of the feedback network are adjusted simultaneously to fix the switching frequency. The proposed switching frequency locking scheme can improve the power efficiency and fix the spectral components of the output at specific frequencies by suitably lowering the switching frequency under light load conditions. Implemented in a 65 nm CMOS, the proposed converter achieves peak efficiency of 96.5% for a 3.3 V input with less than 1.2% frequency error while locking at 1, 0.5 and 0.25 MHz.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleA 96.5% Efficiency Current Mode Hysteretic Buck Converter with 1.2% Error Auto-Selectable Frequency Locking-
dc.typeArticle-
dc.identifier.wosid000437322500038-
dc.identifier.scopusid2-s2.0-85032443848-
dc.type.rimsART-
dc.citation.volume33-
dc.citation.issue9-
dc.citation.beginningpage7733-
dc.citation.endingpage7743-
dc.citation.publicationnameIEEE TRANSACTIONS ON POWER ELECTRONICS-
dc.identifier.doi10.1109/TPEL.2017.2766691-
dc.contributor.localauthorLee, Sang-Gug-
dc.contributor.nonIdAuthorSeo, Jeong-Il-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
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