Quantitative Analysis of Deuterium Annealing Effect on Poly-Si TFTs by Low Frequency Noise and DC I-V Characterization

Deuterium (D-2) annealing was applied to a poly-crystalline silicon thin-film transistor (poly-Si TFT) to improve reliability and performance. The field-effect electron mobility (mu) was extracted using the gate transconductance (gm) method. It was found that mu was improved before and after D-2 annealing. The interface trap density (D-it) as well as the oxide trap density (N-ot) in the poly-Si TFTs was quantitatively extracted using both conventional dc I-V characterization and analysis of low frequency noise (LFN). The profile of N-ot along the depth direction was investigated before and after D-2 annealing using LFN characteristics. It was confirmed that D-it as well as N-ot was reduced by the D-2 annealing, resulting in a reduction in power spectral density and variation.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2018-04
Language
English
Article Type
Article
Keywords

THIN-FILM TRANSISTORS; 1/F NOISE; HYDROGEN PASSIVATION; SILICON; INTERFACE; DEFECTS; DENSITY

Citation

IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.4, pp.1640 - 1644

ISSN
0018-9383
DOI
10.1109/TED.2018.2805316
URI
http://hdl.handle.net/10203/241420
Appears in Collection
EE-Journal Papers(저널논문)
Files in This Item
There are no files associated with this item.
  • Hit : 47
  • Download : 0
  • Cited 0 times in thomson ci
This item is cited by other documents in WoS
⊙ Detail Information in WoSⓡClick to seewebofscience_button

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0