Band bending effect induced by gate voltage on the charge loss behavior of charge trap flash memory devices

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We found that the polarity of the gate voltage (V(g)) during the retention characteristics for a SiO(2)/Si(3)N(4)/Al(2)O(3) (ONA) stack can affect the charge loss direction, due to band bending. Positive V(g) could induce electron de-trapping through Al(2)O(3), while a negative V(g) could induce the same through SiO(2). Consequently, the charge loss rates exhibited a hairpin curve with V(g). We clearly observed that increases of the SiO(2) thickness of the ONA stack induced negative shifts of hairpin curve. This result suggests that the dominant charge loss path could be changed from SiO(2) to Al(2)O(3) by increasing the SiO(2) thickness without V(g).
Publisher
AMER INST PHYSICS
Issue Date
2010-02
Language
English
Article Type
Article
Keywords

RETENTION; CELLS

Citation

APPLIED PHYSICS LETTERS, v.96, no.5

ISSN
0003-6951
DOI
10.1063/1.3295697
URI
http://hdl.handle.net/10203/240843
Appears in Collection
EE-Journal Papers(저널논문)
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