Digital driving circuit for liquid crystal display

Abstract

A digital driving circuit for a liquid crystal display which sequentially receives and displays n-bit digital video information from a data bus on a bit basis. The digital driving circuit comprises a first data latch for sequentially storing the digital video information from the data bus on a bit basis, a shift register for synchronizing a latching operation of the first data latch with bit positions of the digital video information from the data bus, a second data latch for storing the digital video information stored in the first data latch temporarily before digital/analog conversion, and a digital/analog converter for sequentially converting the digital video information stored in the second data latch into analog signals on a bit basis. The digital driving circuit is able to sequentially process bit information of digital video information to reduce the number of data bus lines for loading the bit information thereon and the number of data catches arranged vertically to a column direction. Therefore, the driving circuit can be significantly reduced in its occupying width, thereby making it possible to make the display higher in density.