Method for manufacturing a semiconductor device having a metal layer floating over a substrate

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dc.contributor.authorYoon, Jun-Boko
dc.contributor.authorHan, Chul Hiko
dc.contributor.authorYoon, Euisikko
dc.contributor.authorKim, Choong Kiko
dc.date.accessioned2017-12-20T11:22:53Z-
dc.date.available2017-12-20T11:22:53Z-
dc.date.issued2003-02-11-
dc.identifier.urihttp://hdl.handle.net/10203/233921-
dc.description.abstractA method for manufacturing a semiconductor device where a passive element, such as, an inductor, is floating over a substrate, where an integrated circuit is formed, such that the overall area of the semiconductor device may be highly reduced. According to the present invention, a first metal layer is formed on the substrate, a first masking layer is formed on a portion of the first metal layer, a second metal layer is formed on other portion of the first metal layer on which the first masking layer is not formed, and a second masking layer is formed on the first masking layer and the second metal layer. Then, the first masking layer and a portion of the second masking layer which includes a portion which covers the first masking layer is removed, a third metal layer is formed on portions of the first and second metal layers which are exposed by the step of removing the first masking layer and the portion of the second masking layer. Finally, the second masking layer, the second metal layer; and the first metal layer except a portion which the third metal layer covers are removed. In this way, the area for integrating various passive elements can be saved and the overall area for the semiconductor device including the integrated circuit and the passive elements may be reduced.-
dc.titleMethod for manufacturing a semiconductor device having a metal layer floating over a substrate-
dc.typePatent-
dc.type.rimsPAT-
dc.contributor.localauthorYoon, Jun-Bo-
dc.contributor.localauthorYoon, Euisik-
dc.contributor.nonIdAuthorHan, Chul Hi-
dc.contributor.nonIdAuthorKim, Choong Ki-
dc.contributor.assigneeKAIST-
dc.identifier.iprsType특허-
dc.identifier.patentApplicationNumber09763401-
dc.identifier.patentRegistrationNumber6518165-
dc.date.application2001-02-22-
dc.date.registration2003-02-11-
dc.publisher.countryUS-
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