DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Joon-Ho | ko |
dc.contributor.author | Jeong, Woo Jin | ko |
dc.contributor.author | Seo, Junbeom | ko |
dc.contributor.author | Shin, Mincheol | ko |
dc.date.accessioned | 2017-12-19T00:57:10Z | - |
dc.date.available | 2017-12-19T00:57:10Z | - |
dc.date.created | 2017-11-29 | - |
dc.date.created | 2017-11-29 | - |
dc.date.issued | 2018-01 | - |
dc.identifier.citation | SOLID-STATE ELECTRONICS, v.139, pp.101 - 108 | - |
dc.identifier.issn | 0038-1101 | - |
dc.identifier.uri | http://hdl.handle.net/10203/228424 | - |
dc.description.abstract | Gate-all-around silicon nanowire transistors (SNWTs) are recognized as promising candidates to reduce problems due to quantum effects in conventional nano-transistors. In this study we investigate whether structural modification of SNWTs leads to improved performance. A model calculation for a transistor with a channel length of several nanometers requires a quantum transport simulator, and we use a Wigner transport equation (WTE) discretized by a third-order upwind differential scheme (TDS) suggested by Yamada et al. (2009) for quantum transport simulations of gate-all-around silicon-shell nanowire transistors (SSNWTs), core gate SSNWTs (CG-SSNWTs), and independent CG-SSNWTs (ICG-SSNWTs). A WTE discretized by the TDS is known to produce highly accurate results. The SSNWT has a structure in which an insulator cylinder is inserted into the center axis of the SNWT, and the CG-SSNWT has a structure in which a core gate is inserted into the center axis of the SSNWT. The calculations show that the performances of the SSNWTs are improved by introducing the Si-shell structure and the core gate. The ICG-SSNWTs are identical in structure to the CG-SSNWTs, but the outer and core gates are independently biased. The calculations for the ICG-SSNWTs show that the threshold voltage can be controlled using the difference between the core and outer gate voltages. | - |
dc.language | English | - |
dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | - |
dc.subject | SCHOTTKY-BARRIER MOSFETS | - |
dc.subject | ELECTRON-TRANSPORT | - |
dc.subject | QUANTUM-TRANSPORT | - |
dc.subject | DEVICES | - |
dc.subject | PERFORMANCE | - |
dc.subject | FINFETS | - |
dc.title | Wigner transport simulation of (core gate) silicon-shell nanowire transistors in cylindrical coordinates | - |
dc.type | Article | - |
dc.identifier.wosid | 000417283000015 | - |
dc.identifier.scopusid | 2-s2.0-85032797863 | - |
dc.type.rims | ART | - |
dc.citation.volume | 139 | - |
dc.citation.beginningpage | 101 | - |
dc.citation.endingpage | 108 | - |
dc.citation.publicationname | SOLID-STATE ELECTRONICS | - |
dc.identifier.doi | 10.1016/j.sse.2017.10.041 | - |
dc.contributor.localauthor | Shin, Mincheol | - |
dc.contributor.nonIdAuthor | Lee, Joon-Ho | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordPlus | SCHOTTKY-BARRIER MOSFETS | - |
dc.subject.keywordPlus | ELECTRON-TRANSPORT | - |
dc.subject.keywordPlus | QUANTUM-TRANSPORT | - |
dc.subject.keywordPlus | DEVICES | - |
dc.subject.keywordPlus | PERFORMANCE | - |
dc.subject.keywordPlus | FINFETS | - |
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