Wigner transport simulation of (core gate) silicon-shell nanowire transistors in cylindrical coordinates

Gate-all-around silicon nanowire transistors (SNWTs) are recognized as promising candidates to reduce problems due to quantum effects in conventional nano-transistors. In this study we investigate whether structural modification of SNWTs leads to improved performance. A model calculation for a transistor with a channel length of several nanometers requires a quantum transport simulator, and we use a Wigner transport equation (WTE) discretized by a third-order upwind differential scheme (TDS) suggested by Yamada et al. (2009) for quantum transport simulations of gate-all-around silicon-shell nanowire transistors (SSNWTs), core gate SSNWTs (CG-SSNWTs), and independent CG-SSNWTs (ICG-SSNWTs). A WTE discretized by the TDS is known to produce highly accurate results. The SSNWT has a structure in which an insulator cylinder is inserted into the center axis of the SNWT, and the CG-SSNWT has a structure in which a core gate is inserted into the center axis of the SSNWT. The calculations show that the performances of the SSNWTs are improved by introducing the Si-shell structure and the core gate. The ICG-SSNWTs are identical in structure to the CG-SSNWTs, but the outer and core gates are independently biased. The calculations for the ICG-SSNWTs show that the threshold voltage can be controlled using the difference between the core and outer gate voltages.
Publisher
PERGAMON-ELSEVIER SCIENCE LTD
Issue Date
2018-01
Language
English
Article Type
Article
Keywords

SCHOTTKY-BARRIER MOSFETS; ELECTRON-TRANSPORT; QUANTUM-TRANSPORT; DEVICES; PERFORMANCE; FINFETS

Citation

SOLID-STATE ELECTRONICS, v.139, pp.101 - 108

ISSN
0038-1101
DOI
10.1016/j.sse.2017.10.041
URI
http://hdl.handle.net/10203/228424
Appears in Collection
EE-Journal Papers(저널논문)
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