DC Field | Value | Language |
---|---|---|
dc.contributor.author | Paek, Ji-Seon | ko |
dc.contributor.author | Park, B | ko |
dc.contributor.author | Hong, Song-Cheol | ko |
dc.date.accessioned | 2007-12-03T06:31:21Z | - |
dc.date.available | 2007-12-03T06:31:21Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2006-08 | - |
dc.identifier.citation | ELECTRONICS LETTERS, v.42, no.16, pp.913 - 915 | - |
dc.identifier.issn | 0013-5194 | - |
dc.identifier.uri | http://hdl.handle.net/10203/2272 | - |
dc.description.abstract | A 3-5 GHz ultra-wideband CMOS low-noise amplifier fabricated using 0.18 mu m CMOS process is presented. To achieve wideband characteristics, a two-frequency matching method for input matching is proposed. A cutoff-frequency (f(T)) doubler using Darlington-pair is employed to achieve high gain from 2.4 to 5.4 GHz. The LNA achieves an average gain of 21 dB, input return loss less than -10 dB, and a noise figure of 2.85-4.5 dB at a power consumption of 23 mW The input 1 dB gain compression point (P1 dB) and IIP3 are -22 and -14 dBm at 4 GHz, respectively. | - |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | INST ENGINEERING TECHNOLOGY-IET | - |
dc.title | CMOS LNA with Darlington-pair for UWB systems | - |
dc.type | Article | - |
dc.identifier.wosid | 000240414800014 | - |
dc.identifier.scopusid | 2-s2.0-33746907107 | - |
dc.type.rims | ART | - |
dc.citation.volume | 42 | - |
dc.citation.issue | 16 | - |
dc.citation.beginningpage | 913 | - |
dc.citation.endingpage | 915 | - |
dc.citation.publicationname | ELECTRONICS LETTERS | - |
dc.identifier.doi | 10.1049/el:20061209 | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Hong, Song-Cheol | - |
dc.contributor.nonIdAuthor | Park, B | - |
dc.type.journalArticle | Article | - |
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