The "Art of Trellis Decoding" Is Fixed-Parameter Tractable

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Given n subspaces of a finite-dimensional vector space over a fixed finite field F, we wish to find a linear layout V-1, V-2, ... , V-n of the subspaces such that dim((V-1 + V-2 + ... + V-i) boolean AND (Vi+1 + ... + V-n)) <= k for all i; such a linear layout is said to have width at most k. When restricted to 1-dimensional subspaces, this problem is equivalent to computing the trellis-width (or minimum trellis state-complexity) of a linear code in coding theory and computing the path-width of an F-represented matroid in matroid theory. We present a fixed parameter tractable algorithm to construct a linear layout of width at most k, if it exists, for input subspaces of a finite dimensional vector space over F. As corollaries, we obtain a fixed parameter tractable algorithm to produce a path-decomposition of width at most k for an input. F-represented matroid of path-width at most k, and a fixed-parameter tractable algorithm to find a linear rank-decomposition of width at most k for an input graph of linear rank-width at most k. In both corollaries, no such algorithms were known previously. Our approach is based on dynamic programming combined with the idea developed by Bodlaender and Kloks (1996) for their work on path-width and tree-width of graphs. It was previously known that a fixed-parameter tractable algorithm exists for the decision version of the problem for matroid path-width; a theorem by Geelen, Gerards, and Whittle (2002) implies that for each fixed finite field F, there are finitely many forbidden F-representable minors for the class of matroids of path-width at most k. An algorithm by Hlineny (2006) can detect a minor in an input F-represented matroid of bounded branch-width. However, this indirect approach would not produce an actual path-decomposition. Our algorithm is the first one to construct such a path-decomposition and does not depend on the finiteness of forbidden minors.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2017-11
Language
English
Article Type
Article; Proceedings Paper
Keywords

MONADIC 2ND-ORDER LOGIC; BRANCH-WIDTH; VERTEX-MINORS; CLIQUE-WIDTH; RANK-WIDTH; MATROID PATHWIDTH; GRAPH MINORS; LINEAR-TIME; ALGORITHMS; OBSTRUCTIONS

Citation

IEEE TRANSACTIONS ON INFORMATION THEORY, v.63, no.11, pp.7178 - 7205

ISSN
0018-9448
DOI
10.1109/TIT.2017.2740283
URI
http://hdl.handle.net/10203/227051
Appears in Collection
MA-Journal Papers(저널논문)
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