Total Ionizing Dose Effects on a 12-bit 40kS/s SAR ADC Designed With a Dummy Gate-Assisted n-MOSFET

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A 12-bit 40kS/s successive approximation register analog-to-digital converter (ADC) designed with a dummy gate-assisted (DGA) n-MOSFET is presented for space applications requiring high resolution, low power consumption, and moderate conversion speed. Additionally, a custom-designed metal finger capacitor and a body-tied p-MOSFET protected by guard ring in a bootstrapping circuit were used to mitigate the performance degradation caused by radiation-induced leakage current. The designed ADC was fabricated in a commercial standard 0.35 mu m CMOS process. In order to evaluate its radiation hardness, the fabricated ADC was exposed to Co-60 gamma rays with a dose of up to 300krad (Si). The measured signal-to-noise-and-distortion ratio (SNDR) and spurious-free dynamic range (SFDR) were 67.9dB and 78.7dB, respectively. Although a small amount of degradation of the SNDR was observed after radiation exposure, it corresponds to only about a 0.1 effective-number-of-bit (ENOB) drop from the measured result of an unirradiated chip.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2017-01
Language
English
Article Type
Article
Keywords

CMOS TECHNOLOGIES; RADIATION; CONVERTERS; CIRCUITS; READOUT

Citation

IEEE TRANSACTIONS ON NUCLEAR SCIENCE, v.64, no.1, pp.648 - 653

ISSN
0018-9499
DOI
10.1109/TNS.2016.2631723
URI
http://hdl.handle.net/10203/223343
Appears in Collection
EE-Journal Papers(저널논문)
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