Design-Oriented Analysis for Miller Compensation and Its Application to Multistage Amplifier Design

Cited 52 time in webofscience Cited 0 time in scopus
  • Hit : 1343
  • Download : 0
DC FieldValueLanguage
dc.contributor.authorQu, Wanyuanko
dc.contributor.authorSingh, Shashankko
dc.contributor.authorLee, Yongjinko
dc.contributor.authorSon, Young-Sukko
dc.contributor.authorCho, Gyu-Hyeongko
dc.date.accessioned2017-04-17T07:28:41Z-
dc.date.available2017-04-17T07:28:41Z-
dc.date.created2017-04-10-
dc.date.created2017-04-10-
dc.date.issued2017-02-
dc.identifier.citationIEEE JOURNAL OF SOLID-STATE CIRCUITS, v.52, no.2, pp.517 - 527-
dc.identifier.issn0018-9200-
dc.identifier.urihttp://hdl.handle.net/10203/223273-
dc.description.abstractA design-oriented analysis (DOA) method is presented, which lends sufficient insights into various Miller compensation schemes. The method predicts the nondominant poles of the Miller-compensated amplifiers in an intuitive manner, and it serves as a good supplement to the conventional analysis. The usage of DOA is verified by the various design examples given in this paper. Guided by DOA, a multistage amplifier capable of driving a large-capacitive load (C-L) with low power consumption is presented. This amplifier employs an active zero to extend its Miller loop bandwidth, thereby pushing the amplifier's nondominant poles to high frequencies and achieving larger gain bandwidth (GBW). Fabricated in a 0.18-mu m CMOS process, the amplifier achieves 1.18-MHz GBW and 59.6 degrees phase margin when driving an 18-nF C-L, while consuming 69.6 mu W from a 1.2-V supply. The design shows improved figures-of-merit compared with the prior state-of-the-art Miller-compensated multistage amplifiers.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectLARGE CAPACITIVE LOAD-
dc.subjectFREQUENCY-COMPENSATION-
dc.subject3-STAGE AMPLIFIER-
dc.subjectOPERATIONAL-AMPLIFIERS-
dc.subjectMETHODOLOGY-
dc.subjectTUTORIAL-
dc.subjectBUFFER-
dc.titleDesign-Oriented Analysis for Miller Compensation and Its Application to Multistage Amplifier Design-
dc.typeArticle-
dc.identifier.wosid000395642000015-
dc.identifier.scopusid2-s2.0-85013066353-
dc.type.rimsART-
dc.citation.volume52-
dc.citation.issue2-
dc.citation.beginningpage517-
dc.citation.endingpage527-
dc.citation.publicationnameIEEE JOURNAL OF SOLID-STATE CIRCUITS-
dc.identifier.doi10.1109/JSSC.2016.2619677-
dc.contributor.localauthorCho, Gyu-Hyeong-
dc.contributor.nonIdAuthorSingh, Shashank-
dc.contributor.nonIdAuthorLee, Yongjin-
dc.contributor.nonIdAuthorSon, Young-Suk-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorAmplifier-
dc.subject.keywordAuthorfrequency compensation-
dc.subject.keywordAuthorlarge-capacitive load (C-L)-
dc.subject.keywordAuthorMiller compensation-
dc.subject.keywordAuthormultistage amplifier-
dc.subject.keywordPlusLARGE CAPACITIVE LOAD-
dc.subject.keywordPlusFREQUENCY-COMPENSATION-
dc.subject.keywordPlus3-STAGE AMPLIFIER-
dc.subject.keywordPlusOPERATIONAL-AMPLIFIERS-
dc.subject.keywordPlusMETHODOLOGY-
dc.subject.keywordPlusTUTORIAL-
dc.subject.keywordPlusBUFFER-
Appears in Collection
EE-Journal Papers(저널논문)
Files in This Item
There are no files associated with this item.
This item is cited by other documents in WoS
⊙ Detail Information in WoSⓡ Click to see webofscience_button
⊙ Cited 52 items in WoS Click to see citing articles in records_button

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0