Tunneling Effects in a Charge-Plasma Dopingless Transistor

Abstract

The recently proposed device concept, the so-called charge-plasma (C-P) dopingless transistor (DLT), is revisited. The novel device, which utilizes the workfunction difference between the source/drain (S/D) metal and the substrate enclosing the S/D junction, does not demand external S/D chemical doping via ion implant. It shows excellent immunity against short-channel effects due to an extremely thin junction depth arisen from internal S/D electrical doping, which is the counter-part of the aforementioned chemical doping. For a deeper understanding of C-P devices, the tunneling effects must be considered because of the unavoidable presence of a Schottky barrier at the S/D contact interface. These tunneling effects were found to have a huge impact on current under an ON-and OFF-state. And they strongly depend on the spacer and contact length of the device. The device performance and the feasibility of the C-P DLT are also discussed, specifically, in terms of the Fermi level pinning.