High-performance RF mixer and operational amplifier BiCMOS circuits using parasitic vertical bipolar transistor in CMOS technology

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The electrical characteristics of the parasitic vertical NPN (V-NPN) BJT available in deep n-well 0.18-mum CMOS technology are presented. It has about, 20 of current gain, 7 V of collector-emitter breakdown voltage, 20 V of collector-base breakdown voltage, 40 V of Early voltage, about 2 GHz of cutoff frequency, and about 4 GHz of maximum oscillation frequency at room temperature. The corner frequency of 1/f noise is lower than 4 kHz at 0.5 mA of collector current. The double-balanced RF mixer using V-NPN shows almost free 1/f noise as well as an order of magnitude smaller dc offset compared with CMOS circuit and 12 dB flat gain almost up to the cutoff frequency. The V-NPN operational amplifier for baseband analog circuits has higher voltage gain and better input noise and input offset performance than the CMOS ones at the identical current. These circuits using V-NPN provide the possibility of high-performance direct conversion receiver implementation in CMOS technology.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2005-02
Language
English
Article Type
Article
Keywords

RECEIVER

Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.40, pp.392 - 402

ISSN
0018-9200
URI
http://hdl.handle.net/10203/22239
Appears in Collection
EE-Journal Papers(저널논문)
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