Fabrication and characterization of inorganic-based flexible nonvolatile memory = 무기소재 기반의 유연 비휘발성 메모리의 제작 및 특성평가

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Flexible electronics have been extensively investigated in order to realize system-on-plastic (SoP) ap-plications as the next generation technology in various areas, including flexible displays, artificial skin, wear-able computing devices, e-paper, and bio-integrated medical devices. In particular, flexible memory is con-sidered as an essential component for SoP applications due to its vital role in data processing, storage, and communica-tions with other devices. A number of research groups have reported a variety of organic based flexible memory devices such as flash memory, resistive memory, and ferroelectric memory, directly fabri-cated at relatively low temperature on flexible substrates using spin-coating, roll-to-roll, and other processes. Although these organic-based flexible memories have been well-established with the capability of achieving flexible electronics over large areas in a cost-effective manner, there are still big challenges in developing high-density flexible memory with high performance, including how to resolve insufficient performance arising from inherent material proper-ties and the non-compatibility with complementary metal?oxide?semiconductor (CMOS) processes. To solve these limitations, there have been attempts to transfer printed inorganic materials onto flexi-ble substrates as a method of incorporating the outstanding performance of inorganic materials processed at high temperature on rigid substrates. Several conceptual high-performance devices, such as integrated cir-cuits, inorganic light-emitting diodes, and nanogenerators, have been successfully fabricated by transferring micropatterned inorganic nanomembranes onto flexible substrates. This transfer printing method has enabled excellent electrical performance, exceeding those previously demonstrated on plastic substrates. Chapter 2 describes a resistive random access memory (RRAM) with a one diode-one resistor (1D-1R) architecture in a passive matrix array on flexible substrates. The selection diode is integrated to prevent cell-to-cell interference during memory operation by utilizing its rectifying property. To fabricate single crystal silicon diodes as high performance selection devices of memory, single crystal silicon membranes, which had been doped at high temperature above $950^\circ C$, are arrayed on a plastic substrate by using transfer printing method. The integrated diodes exhibit high-performance electrical properties with a high rectifying ratio of $10^5$ at ±1 V and a current density of $10^5 A/cm^2$ in the forward bias region. The resistance switching phenome-non of 1D-1R memory occurs stably and consistently in repeated DC weep and pulse mode. By integrating high-performance single crystal silicon diodes with plasma-oxidized resistive memory, cell-to-cell interference between adjacent memory cells is effectively prevented, and random access operation of a 1D-1R flexible memory device is thereby successfully performed on a plastic substrate. However, the difficulties of multilayer metal interconnection caused by the inevitable alignment inac-curacies during the transfer process aggravated attempts to scale down to nanometer regime. In particular, putting aside the expense of silicon-on-insulator (SOI) wafers, the fundamental thermal instabilities of poly-mers limit their integration with other functional electronic materials/devices because a high-temperature pro-cess is required after transfer printing, which is incompatible with polymer materials, and this has consistently restricted the achievement of high-density flexible memory for SoP technology. To overcome these issues, there have been novel approaches for fabricating inorganic-based flexible electronic devices that have been fully fabricated on rigid substrates at high temperature to flexible sub-strates. Among approaches for completing the inorganic-based flexible devices, silicon wafer thinning tech-nology is preferred due to compatibility with CMOS and roll-to-roll process. After finishing the whole semi-conductor processes, wafer thinning process can be adopted for fabricating flexible electronic devices by uti-lizing CMP and etching processes. Furthermore, the demand for flexible electronic packaging technology is growing in order to realize packaging completed flexible/wearable devices. Although remarkable progress in flexible electronic devices has been achieved thus far, the electronic packaging technology for flexible elec-tronic devices is still in its infancy. In chapter 3, to address above mentioned limitations, we demonstrates ACF packaged ultrathin Si-based flexible NAND flash memory by employing a simple method. Through delicate etching of the bottom silicon of the SOI wafer, flip-chip bonded device is thinned, and then highly flexible packaging completed Si-based device can be fabricated without cracks nor wrinkles. The contact resistance and the daisy-chain re-sistance successfully remains stable even when the device is severely bent, retaining its value during the 300,000 cycles of repetitive bending. By this method, packaging-completed Si-based flexible NAND-type flash memory array can be fabricated for the first time, which shows memory operation (read/write/erase) and endurance/retention stability as in the rigid device even under 2000-cycles of bending, demonstrating the simplicity and convenience of this method. In chapter 4, we report a conceptual strategy for the fabrication of packaging-completed flexible NAND flash memory using wafer thinning/bonding method via wafer thinning technique based on wet etch-ing process and roll-packaging process. The 16 × 16 flash memory arrays for 256 bit of flexible memory are fabricated on a SOI wafer (200 μm in thickness) using a conventional microfabrication process, and then subsequently interconnect to FPCB substrate through wet etching process of bottom Si (thinning) and roll-packaging process (bonding). The memory operation of the fabricated flexie NAND flash device is success-fully performed under bended condition. Finally, addressing tests of the 16 × 16 flash memory arrays, formed on FPCB substrates, are successfully evaluated in a variety of cases, which is directly related to its compati-bility with flexible nonvolatile memory applications.
Advisors
Lee, Keon-Jaeresearcher이건재researcher
Description
한국과학기술원 :신소재공학과,
Publisher
한국과학기술원
Issue Date
2016
Identifier
325007
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 신소재공학과, 2016.2 ,[xiii, 136 p. :]

Keywords

Flexible nonvolatile memory; Resistive Memory; Flash Memory; Transfer Printing; Wafer Thinning; 유연 비휘발성 메모리; 저항 변화 메모리; 플래시 메모리; 전사인쇄; 웨이퍼 얇게 하기

URI
http://hdl.handle.net/10203/222222
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=648189&flag=dissertation
Appears in Collection
MS-Theses_Ph.D.(박사논문)
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