A 200-mA Digital Low Drop-Out Regulator With Coarse-Fine Dual Loop in Mobile Application Processor

This paper proposes a coarse-fine dual-loop architecture for the digital low drop-out (LDO) regulators with fast transient response and more than 200-mA load capacity. In the proposed scheme, the output voltage is coregulated by two loops, namely, the coarse loop and the fine loop. The coarse loop adopts a fast current-mirror flash analog to digital converter and supplies high output current to enhance the transient performance, while the fine loop delivers low output current and helps reduce the voltage ripples and improve the regulation accuracies. Besides, a digital controller is implemented to prevent contentions between the two loops. Fabricated in a 28-nm Samsung CMOS process, the proposed digital LDO achieves maximum load up to 200 mA when the input and the output voltages are 1.1 and 0.9 V, respectively, with a chip area of 0.021 mm(2). The measured output voltage drop of around 120 mV is observed for a load step of 180 mA.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2017-01
Language
English
Article Type
Article
Keywords

FREQUENCY COMPENSATION; POWER MANAGEMENT; LINEAR REGULATOR; LDO; SOC

Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.52, pp.64 - 76

ISSN
0018-9200
DOI
10.1109/JSSC.2016.2614308
URI
http://hdl.handle.net/10203/220904
Appears in Collection
EE-Journal Papers(저널논문)
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