A 32-KB standard CMOS antifuse one-time programmable ROM embedded in a 16-bit microcontroller

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A 32-KB standard CMOS antifuse one-time programmable (OTP) ROM embedded in a 16-bit microcontroller as its program memory is designed and implemented in 0.18-mu m standard CMOS technology. The proposed 32-KB OTP ROM cell array consists of 4.2 mu m(2) three-transistor (3T) OTP cells where each cell utilizes a thin gate-oxide antifuse, a high-voltage blocking transistor, and an access transistor, which are all compatible with standard CMOS process. In order for high density implementation, the size of the 3T cell has been reduced by 80% in comparison to previous work. The fabricated total chip size, including 32-KB OTP ROM, which can be programmed via external (IC)-C-2 master device such as universal (IC)-C-2 serial EEPROM programmer, 16-bit microcontroller with 16-KB program SRAM and 8-KB data SRAM, peripheral circuits to interface other system building blocks, and bonding pads, is 9.9 mm(2). This paper describes the cell, design, and implementation of high-density CMOS OTP ROM, and shows its promising possibilities in embedded applications.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2006-09
Language
ENG
Article Type
Article
Keywords

BREAKDOWN; EPROM; MODEL

Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.41, pp.2115 - 2124

ISSN
0018-9200
DOI
10.1109/JSSC.2006.880603
URI
http://hdl.handle.net/10203/22026
Appears in Collection
EE-Journal Papers(저널논문)
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