Timing-aware wire width optimization for SADP process

Abstract

Wire width optimization for SADP process is addressed, which involves a decision of how cut- and block-masks should form; a goal is to reduce wire delay in timing critical paths. The problem is formulated using a graph: a vertex corresponds to wire segment with its maximum length for widening as a vertex weight; an edge represents a potential conflict between two candidate wire segments that we wish to widen. A maximum weight independent set corresponds to an ideal solution. For a few circuits that we test, wire resistance of timing critical nets is reduced by 18.5% on average, which leads to 9.9% reduction in clock period.