A Pseudo Single-Stage Amplifier With an Adaptively Varied Medium Impedance Node for Ultra-High Slew Rate and Wide-Range Capacitive-Load Drivability

This paper presents a pseudo single-stage (PSS) amplifier with an adaptively varied medium impedance node to achieve an ultra-high slew rate (SR) and at the same time stable operation in a wide capacitive load range. Owing to the characteristics of the proposed technique, this amplifier achieves a 1.1-to-8.67 V/mu s slew rate and a 0.01-to-1.66 MHz unity gain frequency over a 0.1-to-15 nF capacitive load (C-L) with an over 69. phase margin while consuming a total quiescent power of only 7.4 mu W. This chip was fabricated in a 0.18 mu m CMOS process with a silicon area of 0.0021 mm(2)
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2016-10
Language
English
Article Type
Article
Keywords

NESTED-MILLER COMPENSATION; 3-STAGE AMPLIFIER; FREQUENCY COMPENSATION; MULTISTAGE AMPLIFIERS; BUFFER AMPLIFIER; DRIVERS; TIME

Citation

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.63, no.10, pp.1567 - 1578

ISSN
1549-8328
DOI
10.1109/TCSI.2016.2584919
URI
http://hdl.handle.net/10203/214240
Appears in Collection
EE-Journal Papers(저널논문)
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