DC Field | Value | Language |
---|---|---|
dc.contributor.author | Son, Hyuk Su | ko |
dc.contributor.author | Jang, Joo Young | ko |
dc.contributor.author | Kang, Dong Min | ko |
dc.contributor.author | Lee, Hae Jin | ko |
dc.contributor.author | Park, Chul Soon | ko |
dc.date.accessioned | 2016-09-07T04:22:59Z | - |
dc.date.available | 2016-09-07T04:22:59Z | - |
dc.date.created | 2016-08-29 | - |
dc.date.created | 2016-08-29 | - |
dc.date.issued | 2016-07 | - |
dc.identifier.citation | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.26, no.7, pp.510 - 512 | - |
dc.identifier.issn | 1531-1309 | - |
dc.identifier.uri | http://hdl.handle.net/10203/212869 | - |
dc.description.abstract | This letter presents a four-stage power amplifier (PA) with four-way transformer-based current combining using a standard 65 nm CMOS process. Each stage consists of common source (CS) topology with a capacitive cross-coupling neutralization to improve power gain, reverse isolation and AM-PM distortion. The power stage uses a diode connected NMOS transistor for linearity (AM-AM nonlinearity) enhancement. The proposed PA achieves a small-signal gain of 21 dB and 3-dB bandwidth of 17 GHz, output power of 12.5 dBm at a 1 dB compression point (OP1 dB) and a saturated output power of 15.2 dBm with a peak PAE of 10.3%. The total chip size including the pads and core chip size without the pads are 0.343 mm (2) and 0.103 mm (2), respectively | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A 109 GHz CMOS Power Amplifier With 15.2 dBm Psat and 20.3 dB Gain in 65-nm CMOS Technology | - |
dc.type | Article | - |
dc.identifier.wosid | 000380125000015 | - |
dc.identifier.scopusid | 2-s2.0-84974814559 | - |
dc.type.rims | ART | - |
dc.citation.volume | 26 | - |
dc.citation.issue | 7 | - |
dc.citation.beginningpage | 510 | - |
dc.citation.endingpage | 512 | - |
dc.citation.publicationname | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | - |
dc.identifier.doi | 10.1109/LMWC.2016.2574834 | - |
dc.contributor.localauthor | Park, Chul Soon | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | CMOS | - |
dc.subject.keywordAuthor | D-band | - |
dc.subject.keywordAuthor | diode linearization | - |
dc.subject.keywordAuthor | neutralization | - |
dc.subject.keywordAuthor | PAE | - |
dc.subject.keywordAuthor | power amplifier (PA) | - |
dc.subject.keywordAuthor | saturated output power | - |
dc.subject.keywordAuthor | W-band | - |
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