Valley-engineered ultra-thin silicon for high-performance junctionless transistors

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Extremely thin silicon show good mechanical flexibility because of their 2-D like structure and enhanced performance by the quantum confinement effect. In this paper, we demonstrate a junctionless FET which reveals a room temperature quantum confinement effect (RTQCE) achieved by a valley-engineering of the silicon. The strain-induced band splitting and a quantum confinement effect induced from ultra-thin-body silicon are the two main mechanisms for valley engineering. These were obtained from the extremely well-controlled silicon surface roughness and high tensile strain in silicon, thereupon demonstrating a device mobility increase of similar to 500% in a 2.5 nm thick silicon channel device.
Publisher
NATURE PUBLISHING GROUP
Issue Date
2016-07
Language
English
Article Type
Article
Keywords

FIELD-EFFECT TRANSISTORS; QUANTUM CONFINEMENT; GRAPHENE

Citation

SCIENTIFIC REPORTS, v.6, pp.29354

ISSN
2045-2322
DOI
10.1038/srep29354
URI
http://hdl.handle.net/10203/212565
Appears in Collection
EE-Journal Papers(저널논문)
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