DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Woo-Young | ko |
dc.contributor.author | Shim, Hyun Bin | ko |
dc.contributor.author | Jeon, Gwang-Jae | ko |
dc.contributor.author | Kang, In-Ku | ko |
dc.contributor.author | Lee, Hee Chul | ko |
dc.date.accessioned | 2016-07-25T09:35:08Z | - |
dc.date.available | 2016-07-25T09:35:08Z | - |
dc.date.created | 2016-07-18 | - |
dc.date.created | 2016-07-18 | - |
dc.date.issued | 2016-07 | - |
dc.identifier.citation | MICROELECTRONIC ENGINEERING, v.160, pp.68 - 72 | - |
dc.identifier.issn | 0167-9317 | - |
dc.identifier.uri | http://hdl.handle.net/10203/212099 | - |
dc.description.abstract | Ferroelectric multi-bit storage memory which is fabricated by means of the patterning and double-coating of ferroelectric polymer film is demonstrated. The multi-bit memory device demonstrated here has two thicknesses in a capacitor. Therefore, ferroelectric switching at each thickness arises in different voltage range. The structured capacitor with two different thicknesses is realized by optimizing two processes, i.e., the photo-lithographical patterning of the ferroelectric film and a double-coating method for the formation of the multilayer structure. Not only photo-lithographical patterning but also the double-coating method of ferroelectric film was performed with a solubility-controlled ferroelectric polymer solution created by the addition of an insoluble solvent. From electrostatic force microscopy and displacement-voltage measurements, the fabricated multi-bit storage memory operated as predicted for a multi-bit memory scheme. The solubility-controlling method suggested here will offer additional promising routes to fabricate complex organic devices based on a solution process. (C) 2016 Elsevier B.V. All rights reserved | - |
dc.language | English | - |
dc.publisher | ELSEVIER SCIENCE BV | - |
dc.subject | TRANSISTORS | - |
dc.title | Solution-processed conformal coating of ferroelectric polymer film and its application to multi-bit memory device | - |
dc.type | Article | - |
dc.identifier.wosid | 000378456000012 | - |
dc.identifier.scopusid | 2-s2.0-84962656844 | - |
dc.type.rims | ART | - |
dc.citation.volume | 160 | - |
dc.citation.beginningpage | 68 | - |
dc.citation.endingpage | 72 | - |
dc.citation.publicationname | MICROELECTRONIC ENGINEERING | - |
dc.identifier.doi | 10.1016/j.mee.2016.03.037 | - |
dc.contributor.localauthor | Lee, Hee Chul | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | VDF-TrFE | - |
dc.subject.keywordAuthor | Solubility control | - |
dc.subject.keywordAuthor | Patterning | - |
dc.subject.keywordAuthor | Multilayer | - |
dc.subject.keywordAuthor | Multi-bit memory | - |
dc.subject.keywordPlus | TRANSISTORS | - |
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