Vertically Integrated Multiple Nanowire Field Effect Transistor

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A vertically integrated multiple channel-based field-effect transistor (PET) with the highest number of nanowires reported ever is demonstrated on a bulk silicon substrate without use of wet etching. The driving current is increased by 5-fold due to the inherent vertically stacked five-level nanowires, thus showing good feasibility of three-dimensional integration-based high performance transistor. The developed fabrication process, which is simple and reproducible, is used to create multiple stiction-free and uniformly sized nanowires with the aid of the one-route all-dry etching process (ORADEP). Furthermore, the proposed FET is revamped to create nonvolatile memory with the adoption of a charge trapping layer for enhanced practicality. Thus, this research suggests an ultimate design for the end-of-the-roadmap devices to overcome the limits of scaling.
Publisher
AMER CHEMICAL SOC
Issue Date
2015-12
Language
English
Article Type
Article
Citation

NANO LETTERS, v.15, no.12, pp.8056 - 8061

ISSN
1530-6984
DOI
10.1021/acs.nanolett.5b03460
URI
http://hdl.handle.net/10203/205717
Appears in Collection
EE-Journal Papers(저널논문)
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