Results 11-20 of 60 (Search time: 0.003 seconds).
NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
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Thin Oxide Damage by Plasma Etching and Ashing Processes Hyung-Cheol Shin, Proc. IEEE International Reliability Phys. Symp., pp.37 - 41, 1992 | |
Characterization of Process-Induced Damage During Aluminum Etching and Photoresist Ashing Hyung-Cheol Shin, International Wafer Level Reliability Workshop, pp.133 - 144, 1991 | |
A nano-structure Memory with SOI Edge channel and A nano dot Hyung-Cheol Shin, MNC(Microproceses and Nanotechnology Conference), pp.315 - 316, 1998 | |
Recessed Channel(RC) SOI NMOSFET's with Self-Aligned Polysilicon Gate Formed on the RC Region Hyung-Cheol Shin, Proc. IEEE International SOI Conference, pp.122 - 123, 1996 | |
A Simple Technique to Measure Generation Lifetime in Partially Depleted SOI MOSFETS Hyung-Cheol Shin, 5th International Conference on VLSI and CAD, pp.55 - 59, 1997 | |
Process-Induced Charging Damage in PETEOS for Interlevel Dielectric Applications Hyung-Cheol Shin, International Symposium on Plasma Process-Induced Damage, pp.109 - 112, 1996 | |
Comparison of the characteristics of tunneling oxide and tunneling ON for P-channel Nano-crystal Memory Hyung-Cheol Shin, The 6th International Conference on VLSI and Cad(ICVC'99), pp.233 - 236, 1999 | |
Silicon MOS Memory with self-aligned Quantum Dot on Narow Channel Hyung-Cheol Shin, ICVC99, pp.187 - 189, 1999 | |
Fabrication and Characterization of a Quantum Dot Flash Memory Hyung-Cheol Shin, 99 International Workshop on Advanced LSI's and Devices, pp.12 - 15, 1999 | |
A New SOI Inverter using Active Body-Bias Hyung-Cheol Shin, ITC-CSCC, pp.1457 - 1459, 1998 |
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