Browse "RIMS Conference Papers" by Title

Showing results 28 to 47 of 2618

A Study on Deposition of Laminar Pyrolytic Carbon Deposited in Tumbling Bed

Lee, Jai Young, 6th World Congress on High-tech Ceramics

A 1-V 5 GHz low phase noise LC-VCO using voltage-dividing and bias-level shifting technique

Song T.; Yoon E.researcher, 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers, pp.87 - 90, 2004-09-08

A 1.2-V 8-mW 2.4-GHz CMOS RF receiver IC for low power WPAN

Kwon I.; Song S.; Ko J.researcher, 2006 IEEE Sarnoff Symposium, 2006-03-27

A 1.8-GHz Self-calibrated Phase-locked Loop with Precise I/Q Matching

Beom-Sup Kimresearcher, AP-ASIC 2000 Proceedings of the Second IEEE Asia Pacific Conference on, pp.81 - 84, 2000

A 13 bit 2.5 MHz Self-Calibrated Pipelined A/D Converter in 3um CMOS

Beom-Sup Kimresearcher, IEEE Symposium on VLSI CIrcuits, pp.33 - 34, 1990

A 13GHZ CMOS distributed oscillator using MEMS coupled transmission lines for low phase noise

Park E.-C.; Yoon E.researcher, Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement, v.47, pp.244 - 245, 2003-02-15

A 16b quadrature direct digital frequency synthesizer using interpolative angle rotation algorithm

Song Y.; Kim B.researcher, 2002 Symposium on VLSI Circuits Digest of Technical Papers, pp.146 - 147, 2002-06-13

A 1x1, 512x512 poly-Si TFT-LCD with Integrated 8-bit Parallel-Serial Digital Data Drivers

Chul-Hi Hanresearcher, IDMC 2000, pp.115 - 118, 2000

A 2.4-GHz CMOS LNA with harmonic cancellation and current reuse technique

Kwon I.; Gil J.; Lee K.; 신형철researcher, 제9회 반도체학술대회, pp.251 - 254, 제9회 반도체학술대회, 2002-02

A 2.4-GHz Fully Integrated CMOS Quadrature VCO

Hyung-Cheol Shinresearcher, Asia Pacific-System on a Chip 2002, pp.207 - 210, 2002

A 2.4-GHz Fully Integrated CMOS Quadrature VCO

신형철researcher, IDEC Conference 2002-Summer, pp.31 - 34, 2002

A 2.6GHz Low Phase-Noise VCO Monolithically Integrated with High Q MEMS Inductors

Euisik Yoonresearcher, European Solid-State Circuits Conference, pp.143 - 146, 2002

A 200 x 160 pixel CMOS fingerprint recognition SoC with adaptable column-parallel processors

Kim S.-J.; Lee K.-H.; Han S.-W.; Yoon E.researcher, 2005 IEEE International Solid-State Circuits Conference, ISSCC, v.48, pp.250 -, 2005-02-06

A 230MHz 8 Tap Programmable FIR Filter Using Redundant Binary Number System

Euisik Yoonresearcher, IEEE ISCAS, 1999

A 250MHz direct digital frequency synthesizer with ΣΔ noise shaping

Song Y.; Kim B.researcher, 2003 Digest of Technical Papers, 2003-02-09

A 250MHz Low Jitter Adaptive Bandwidth PLL

Beom-Sup Kimresearcher, IEEE International Solid-State Circuit Conferece, 1999

A 2GHz 16dBm IIP3 low noise amplifier in 0.25um CMOS technology

Youn Y.-S.; Chang J.-H.researcher; Koh K.-J.; Lee Y.-J.; Yu H.-K., 2003 Digest of Technical Papers, 2003-02-09

A 3-mW, -119.2dBc/Hz@1MHz, 2.6-GHz, CMOS quadrature VCO using helical inductors as a noise filter

신형철researcher, 제10회 반도체학술대회, 제10회 반도체학술대회, 2003-02

A 30MHz High-Speed Analog/Digital PLL in 2um CMOS

Beom-Sup Kimresearcher, IEEE Int. Conf. on Solid-State Circuits, pp.104 - 105, 1990

A 4-Gb/s/pin current mode 4-level simultaneous bidirectional I/O with current mismatch calibration

Kim Y.S.; Shin S.researcher; Kang S.-M., ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.1007 - 1010, 2006-05-21


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