Browse "RIMS Conference Papers" by Title

Showing results 21 to 40 of 2611

21

3D GIS Application in in U-City

Park, Sang Chan, 1st Mongolia-Korea Joing Workshop on CAD/CAM, pp.18 - 18, 2007

22

45 nm baised spacer MOSFET

Hyung-Cheol Shinresearcher, Silicon Nanoelectronics Workshop, pp.126 - 127, 2003

23

4차 산업혁명 시대의 중소벤처기업 글로벌 경쟁력 강화 전략

이의훈researcher, 시스템 엔지니어링 2018년 추계학술대회, pp.7 - 7, 한국시스템엔지니어링 학회, 2018-10-25

24

50 nm MOSFET with Floating Polysilicon Spacer

Hyung-Cheol Shinresearcher, IEEE Silicon Nanoelectronics Workshop, pp.54 - 55, 2001

25

50 nm MOSFET with High-k Dielectric Sidewall

Hyung-Cheol Shinresearcher, IEEE Silicon Nanoelectronics Workshop, pp.70 - 71, 2001

26

5G K-simulator: Link level simulator for

Park, G; Park, S; Seo, J; So, J; Wang, W; Yoo, S; Lim, SC; et al, IEEE DySPAN 2018, IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2018-10-23

27

836 MHz/1.95GHz dual-band Class-E power amplifier using composite right/left-handed transmission lines

Ji S.H.; Hwang G.S.; Cho O.S.; Lee J.W.; Kim J.researcher, 36th European Microwave Conference, EuMC 2006, pp.356 - 359, 2006-09-10

28

A Study on Deposition of Laminar Pyrolytic Carbon Deposited in Tumbling Bed

Lee, Jai Young, 6th World Congress on High-tech Ceramics

29

A 1-V 5 GHz low phase noise LC-VCO using voltage-dividing and bias-level shifting technique

Song T.; Yoon E.researcher, 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers, pp.87 - 90, 2004-09-08

30

A 1.2-V 8-mW 2.4-GHz CMOS RF receiver IC for low power WPAN

Kwon I.; Song S.; Ko J.researcher, 2006 IEEE Sarnoff Symposium, 2006-03-27

31

A 1.8-GHz Self-calibrated Phase-locked Loop with Precise I/Q Matching

Beom-Sup Kimresearcher, AP-ASIC 2000 Proceedings of the Second IEEE Asia Pacific Conference on, pp.81 - 84, 2000

32

A 13 bit 2.5 MHz Self-Calibrated Pipelined A/D Converter in 3um CMOS

Beom-Sup Kimresearcher, IEEE Symposium on VLSI CIrcuits, pp.33 - 34, 1990

33

A 13GHZ CMOS distributed oscillator using MEMS coupled transmission lines for low phase noise

Park E.-C.; Yoon E.researcher, Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement, v.47, pp.244 - 245, 2003-02-15

34

A 16b quadrature direct digital frequency synthesizer using interpolative angle rotation algorithm

Song Y.; Kim B.researcher, 2002 Symposium on VLSI Circuits Digest of Technical Papers, pp.146 - 147, 2002-06-13

35

A 1x1, 512x512 poly-Si TFT-LCD with Integrated 8-bit Parallel-Serial Digital Data Drivers

Chul-Hi Hanresearcher, IDMC 2000, pp.115 - 118, 2000

36

A 2.4-GHz CMOS LNA with harmonic cancellation and current reuse technique

Kwon I.; Gil J.; Lee K.; 신형철researcher, 제9회 반도체학술대회, pp.251 - 254, 제9회 반도체학술대회, 2002-02

37

A 2.4-GHz Fully Integrated CMOS Quadrature VCO

Hyung-Cheol Shinresearcher, Asia Pacific-System on a Chip 2002, pp.207 - 210, 2002

38

A 2.4-GHz Fully Integrated CMOS Quadrature VCO

신형철researcher, IDEC Conference 2002-Summer, pp.31 - 34, 2002

39

A 2.6GHz Low Phase-Noise VCO Monolithically Integrated with High Q MEMS Inductors

Euisik Yoonresearcher, European Solid-State Circuits Conference, pp.143 - 146, 2002

40

A 200 x 160 pixel CMOS fingerprint recognition SoC with adaptable column-parallel processors

Kim S.-J.; Lee K.-H.; Han S.-W.; Yoon E.researcher, 2005 IEEE International Solid-State Circuits Conference, ISSCC, v.48, pp.250 -, 2005-02-06

Discover

rss_1.0 rss_2.0 atom_1.0