Gate driving method for synchronous rectifiers in phase-shifted full-bridge converter

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In high output current applications such as server power system, a phase-shifted full-bridge (PSFB) converter uses parallel connected power MOSFETs in synchronous rectifiers to reduce secondary conduction loss. However, it causes large gate driving loss. Therefore, this paper proposes a simple synchronous rectifiers (SRs) gate driving method for the PSFB converter. The proposed method reduces the supply voltage of SRs gate driver with a conventional input resistor and capacitor of SRs gate driver during the overlapping time of OR-gated signals in SRs. Therefore, without additional components and control techniques, the proposed method can significantly reduce the gate driving loss on SRs especially in light load conditions. The validity of the proposed method is confirmed by experimental results from a prototype with 400V input and 750W/12V output.
Publisher
IEEE
Issue Date
2015-06-02
Language
English
Citation

Power Electronics and ECCE Asia (ICPE-ECCE Asia), 2015 9th International Conference on, pp.753 - 758

DOI
10.1109/ICPE.2015.7167867
URI
http://hdl.handle.net/10203/200512
Appears in Collection
EE-Conference Papers(학술회의논문)

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