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Capacitive coupled 3-Tap FFE and RC-filtered DDJ compensator for on chip global interconnects = 온 칩 데이터 전송을 위한 커패시터 결합 구조의 이퀄라이저와 데이터 의존성 지터 보상 회로link Oh, Jie-Hwan; 오지환; et al, 한국과학기술원, 2012 |
Signal Integrity and Computing Performance Analysis of a Processing-In-Memory of High Bandwidth Memory (PIM-HBM) Scheme Kim, Seongguk; Kim, Subin; Cho, Kyungjun; Shin, Taein; Park, Hyunwook; Lho, Daehwan; Park, Shinyoung; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.11, no.11, pp.1955 - 1970, 2021-11 |
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