Browse "School of Electrical Engineering(전기및전자공학부)" by Subject hardware architecture
Showing results 1 to 4 of 4
| Adaptive tessellation of PN triangles using minimum-artifact edge linking Choi, YS; Chung, KS; Kim, Lee-Sup, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E87A, pp.2821 - 2828, 2004-10 |
| Adaptive tessellation of PN triangles using minimum-artifact edge linking = 최소 결함 에지 연결을 이용한 PN Triangle의 적응 모자이크 기법link Choi, Yun-Seok; 최윤석; et al, 한국과학기술원, 2005 |
| EGCN: An Efficient GCN Accelerator for Minimizing Off-Chip Memory Access Han, Yunki; Park, Kangkyu; Jung, Youngbeom; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.71, no.12, pp.3127 - 3139, 2022-12 |
| NearZero: An Integration of Phase Change Memory with Multi-Core Coprocessor Jung, Myoungsoo, IEEE COMPUTER ARCHITECTURE LETTERS, v.16, no.2, pp.136 - 140, 2017-07 |
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