Browse "School of Electrical Engineering(전기및전자공학부)" by Author 1245
Showing results 60 to 93 of 93
| One-transistor nonvolatile SRAM (ONSRAM) on silicon nanowire SONOS Ryu, S.-W.; Han, J.-W.; Moon, D.-I.; Choi, Yang-Kyu, 2009 International Electron Devices Meeting, IEDM 2009, pp.633 - 636, 2009-12-07 |
| Operational Guidelines of a Novel 2-bits cell SONOS Non-volatile Memory Choi, Yang-Kyu; Kim, Kuk-Hwan; Lee, Hyunjin, The 13th Korean Conference on Semiconductors (KCS), pp.1115 - 1116, 2006-02 |
| Physical Insights on Design and Modeling of Nanoscale FinFETs Choi, Yang-Kyu; Fossum, J.G.; Chowdhury, M.M; Trivedi, V.P; King, T.-J.; Yu, B., IEEE, pp.29.1.1 - 29.1.4, IEEE, 2003-12 |
| Planar Nanogap Capacitor Arrays on Quartz for Optical and Dielectric Bioassay Choi, Yang-Kyu; Kang, Ho Kwan; Seo, Jeonggi; Carlo, Dino Di; Lee, Luke P., mTAS, pp.697 - 700, 2003-10 |
| Power optimization of thermally actuated organic display by pulse width modulation technique Choi, J.-M.; Yarimaga, O.; Yoon, B.; Kim, J.-M.; Choi, Yang-Kyu, 10th International Meeting on Information Display and International Display Manufacturing Conference and Asia Display 2010, IMID/IDMC/ASIA Display 2010, pp.656 - 657, 10th International Meeting on Information Display and International Display Manufacturing Conference and Asia Display 2010, IMID/IDMC/ASIA Display 2010, 2010-10-11 |
| Punchthrough Characteristics of CMOS Souble-Gate FinFET Choi, Yang-Kyu; Ryu, Seong-Wan; Lee, Hyunjin, The 12th Korean Conference on Semiconductors (KCS), pp.97 - 98, 2005-02 |
| Quasi-Planar FinFETs with Selectively Grown Germanium Raised Source/Drain Choi, Yang-Kyu; Lindert, N; Chang, L; Anderson, E; Lee, WC; King, TJ; Bokor, J; et al, IEEE International SOI Conference Proceedings, pp.111 - 112, IEEE, 2001-10-01 |
| Quasi-Planar NMOS FinFETs with sub-100nm Gate Lengths Choi, Yang-Kyu; Lindert, Nick; Chang, Leland; Anderson, Erik; Lee, Wenchin; King, Tsu-Jae; Bokor, Jeffrey; et al, 59th IEEE Device Research Conference Proceedings, pp.26 - 27, IEEE, 2001-06 |
| Real-time detection of avian influenza using double-gate nanowire field effect transistors Ahn, Jae Hyuk; Park, Tae Jung; Lee, Sang Yup; Choi, Yang-Kyu, IEEE-NANOMED 2011 jointly organized with Biotronics 2011, IEEE, 2011-11-10 |
| Reduction of Direct- Tunneling Gate Leakage Current in Double-Gate and Ultra-Thin Body MOSFETs Choi, Yang-Kyu; Chang, Leland; Yang, Kevin J.; Yeo, Tee-Chia; King, Tsu-Jae; Hu, Chenming, IEEE, pp.99 - 102, IEEE, 2001-12 |
| Reduction of Gate-Induced Drain Leakage (GIDL) Current in Single-Gate Ultra-Thin Body and Double-Gate FinFET Devices Choi, Yang-Kyu; Ha, Daewon; King, Tsu-Jae; Bokor, Jeffrey, International Conference on Solid State Devices and Materials, pp.140 - 141, 2002-09 |
| Reliability issues in multi-gate FinFETs Choi, Yang-Kyu; Han, J.-W.; Lee, H., ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, pp.1101 - 1104, 2006-10-23 |
| Reliability Study of CMOS FinFETs Choi, Yang-Kyu; Ha, Daewon; Snow, Eric; Bokor, Jeffrey; King, Tsu-Jae, IEEE, pp.177 - 180, IEEE, 2003-12 |
| Retention Mechanism in Double-Gate 1T Capacitorless DRAM by Using PiFET Structure Bae, Dong-il; Kim, Sungho; Choi, Yang-Kyu, Silicon Nanoelectronics Workshop, Silicon Nanoelectronics Workshop, 2007-07 |
| Saddle-FET의 GIDL특성 분석 및 모델링 최양규; 이유준; 이현진; 정성웅, The 15th Korean Conference on Semiconductors (KCS), pp.635 - 636, 2008-02 |
| Scaling of the Pull-In Voltage in a Novel CMOS-Compatible NEMS Switch Baek, David J.; Choi, Sung Jin; Moon, Dong Il; Choi, Yang-Kyu, 2011 International Conference on Solid State Devices and Materials, pp.412 - 413, IEEE, 2011-09-29 |
| Silicon Nanowire Device for Logic Switch and Non-Volatile Memory Applications (Invited) Choi, Yang-Kyu; Lee, Hyunjin; Han, Jin-Woo, International Symposium on Nanostructured Materials, pp.15 - 19, 2007 |
| Size Reduction Lithography and Nanoimprint Lithography for the Fabrication of Platinum Nanocatalysts: A Reaction Study Choi, Yang-Kyu; Grunes, J.; Zhu, J.; Contreras, A.; Somorjai, G.A.; Bokor, J., International Conference on Nanoimprint and Nanoprint Technology, 2003-11 |
| Spacer FinFET: Nano-scale CMOS Technology for the Terabit Era Choi, Yang-Kyu; King, Tsu-Jae; Hu, Chenming, International Semiconductor Device Research Symposium, pp.543 - 546, 2001-12 |
| Structural modification of dielectric-modulated field-effect transistor for sensitivity improvement Kim, Chang Hoon; Choi, Yang-Kyu, IEEE-NANOMED 2011 jointly organized with Biotronics 2011, IEEE, 2011-11-10 |
| Study of surface morphology control for a cell implant onto an all in one chip Choi, Yang-Kyu; Yarimaga, Oktay; Song, Seungjeong; Choi, Chulhee, The 13th International Conference on Miniaturized Systems for Chemistry and Life Sciences (microTAS), pp.201 - 203, 2009-11 |
| Sub-20nm CMOS FinFET Technologies Choi, Yang-Kyu; Lindert, Nick; Xuan, Peiqi; Tang, Stephen; Ha,Daewon; Anderson, Erik; King, Tsu-Jae; et al, IEEE, pp.421 - 424, IEEE, 2001-12 |
| Sub-50nm FinFET : PMOS Choi, Yang-Kyu; Huang, Xuejue; Lee, Wen-Chin; Kuo, Charles; Hisamoto, Digh; Chang, Leland; Kedzierski, Jakub; et al, IEDM Technical Digest, pp.67 - 70, IEEE, 1999-12 |
| Sub-5nm all-around gate FinFET for ultimate scaling Lee, H.; Yu, L.-E.; Ryu, S.-W.; Han, J.-W.; Jeon, K.; Jang, D.-Y.; Kim, K.-H.; et al, 2006 Symposium on VLSI Technology, VLSIT, pp.58 - 59, 2006-06-13 |
| Sub-Lithographic Nanofabrication Technology for Nanocatalysts and DNA Chips Choi, Yang-Kyu; Lee, Joon Sung; Zhu, Ji; Somorjai, Gabor A.; Lee, Luke P.; Bokor, Jeffrey, International Conference on Electron, Ion, and Photon Beam Technology and Nanofabrication, pp.77 - 78, 2003-05 |
| Sub-Lithographic Patterning Technology for Nanowire Model Catalysts and DNA Label-Free Hybridization Detection Choi, Yang-Kyu; Grunesb, Jeff; Lee, Joon Sung; Zhu, Ji; Somorjai, Gabor A.; Lee, Luke P.; Bokor, Jeffrey, SPIE, v.5520, pp.10 - 19, 2003-08 |
| Sub-lithographic Vertical Nanogap Fabrication for Electrical Detection of Protein-Ligand Interactions Choi, Yang-Kyu; Jang, Dong-Yoon; Kim, Young-Pil; Kim, Hak-Sung, Electron, Ion, and Photon Beam Technology & Nanofabrication, pp.431 - 432, 2005-05-31 |
| Sublithographic Nanogap Fabrication Method Using Self-Assembled Monolayer Lithography Choi, Yang-Kyu; Kim, Ju-Hyun; Yoo, Seung Min; Lee, Sang Yup, The 14th Korean Conference on Semiconductors (KCS), pp.707 - 708, 2007-02 |
| Superhydrophobic Trans-scale Structure using a Combination of a Silicon Microbowl and CNT Forest for Biomimetic Architecture Choi, Yang-Kyu; Kim, Ju-Hyun; Park, Yong-Bum, The 13th International Conference on Miniaturized Systems for Chemistry and Life Sciences (microTAS), 2009-11 |
| Threshold Voltage Shift by Quantum Confinement in Ultra-thin Body Device Choi, Yang-Kyu; Ha, Daewon; King, Tsu-Jae; Hu, Chenming, IEEE, pp.85 - 86, 2001-06 |
| Tunable Work Function Molybdenum Gate Technology for FDSOI-CMOS Choi, Yang-Kyu; Ranade, Pushkar; Ha, Daewon; Agrwal, Aditya; Ameen, Michae; King, Tsu-Jae, IEEE, pp.363 - 366, IEEE, 2002-12 |
| Ultra-Thin Body PMOSFETs with Selectively Deposited Ge Source/Drain Choi, Yang-Kyu; Ha, Daewon; King, Tsu-Jae; Hu, Chenming, 2001 IEEE Symposium on VLSI Technology Digest of Technical Papers, pp.19 - 20, IEEE, 2001-06 |
| Ultra-Thin Body Silicon- on-Insulator (UTB SOI) MOSFET with Metal Gate Work-Function Engineering for Sub-70nm Technology Node Choi, Yang-Kyu; Ha, Daewon; Ranade, Pushkar; Lee, Jeong-Soo; King, Tsu-Jae; Hu, Chenming, International Conference on Solid State Devices and Materials, pp.782 - 783, 2002-09 |
| Ultra-thin Body SOI MOSFET for Deep-Sub-Tenth Micron Era Choi, Yang-Kyu; Asano, Kazuya; Lindert, Nick; Subramanian, Vivek; King, Tsu-Jae; Bokor, Jeffrey; Hu, Chenming, IEEE, pp.919 - 921, IEEE, 1999-12 |
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