Browse "School of Electrical Engineering(전기및전자공학부)" by Author Zang, H

Showing results 1 to 7 of 7

1

Dopant Segregated Pt and Ni-Germanide Schottky S/D p-MOSFETs with Strained Si-SiGe channel, 211th Electrochemical Society Meeting, SYMPOSIUM E1

Cho, Byung Jinresearcher; Zang, H; Chua, CK; Loh, WY, Electrochemical Society Meeting, SYMPOSIUM E1, 2007

2

Improved current drivability and gate stack integrity using buried SiC layer for strained Si/SiGe channel devices

Cho, Byung Jinresearcher; Zang, H; Loh, WY; Oh, HJ; Choi, KJ; Nguyen, HS; Lo, GQ, 211th Electrochemical Society Meeting, pp.0 - 0, 2007-05-06

3

Integration of Dual Channels MOSFET on Defect-Free, Tensile-Strained Germanium on Silicon

Cho, Byung Jinresearcher; Zang, H; Loh, WY; Ye, JD; Loh, TH; Lo, GQ, 2007 International Conference on Solid State Devices and Materials(SSDM), pp.0 - 0, 2007-09-18

4

Integration of high-K gate dielectric into high mobility substrate

Cho, Byung Jinresearcher; Loh, WP; Zang, H; Dalapati, GK; Tong, Y; Choi, KJ, 2006 International Workshop on DIELECTRIC THIN FILMS FOR FUTURE ULSI DEVICES SCIENCE AND TECHNOLOGY, pp.8 - 10, 2006-11-10

5

Integration of Tensile-Strained Ge p-i-n Photodetector on Advanced CMOS Platform

Cho, Byung Jinresearcher; Wang, J; Loh, WY; Zang, H; Yu, MB; Chua, KT; Loh, TH, 4th International Conference on Group IV Photonics, pp.0 - 0, 2007-09-19

6

Strained Si/SiGe channel with buried Si0.99C0.01 for improved drivability, gate stack integrity and noise performance

Loh, WY; Zang, H; Oh, HJ; Choi, KJ; Nguyen, HS; Lo, GQ; Cho, Byung Jinresearcher, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.54, pp.3292 - 3298, 2007-12

7

Tensile-strained germanium CMOS integration on silicon

Zang, H; Loh, WY; Ye, JD; Lo, GQ; Cho, Byung Jinresearcher, IEEE ELECTRON DEVICE LETTERS, v.28, no.12, pp.1117 - 1119, 2007-12

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