Chip-Level Simultaneous Switching Current Measurement in Power Distribution Network Using Magnetically Coupled Embedded Current Probing Structure

Abstract

A simultaneous switching current (SSC) drawn by an integrated circuit (IC) creates simultaneous switching noise on power nets, which in turn causes jitters in the I/O signals and reduces the maximum clock frequency. For a thorough analysis of high-speed ICs, there is a dire need to measure currents at specific power pins of the ICs. In this paper, a novel magnetically coupled embedded current probing structure is proposed for measuring the SSC on the chip level resulting from the logical activity of the I/O buffers. SSCs are found by capturing the magnetic flux induced by the SSC of interest, with the proposed embedded current probing structure using magnetic coupling, and then reconstructing the original current waveform using the transfer impedance profile. Through a series of measurements with test vehicles fabricated on the chip level, we experimentally verified the proposed probing structures in the time and frequency domains and proved that they can effectively measure the SSC. Finally, future directions for improvements are discussed at the end of this paper.