A 0.791 mm(2) On-Chip Self-Aligned Comparator Controller for Boost DC-DC Converter Using Switching Noise Robust Charge-Pump

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Herein we propose a new PWM controller for a DC-DC converter with a Self-aligned Comparator Control (SCC), the purpose of which is to overcome sub-harmonic switching and hysteretic characteristics that are problematic in conventional comparator control schemes. In the proposed scheme, the condition of the output voltage is converted to the form of a phase difference through the SCC block. The main control loop of the converter regulates the inductor current which is built up to an optimum value by using this phase difference. In addition to the SCC, the proposed PWM controller is fully integrated on-chip without off-chip components to decrease the size and cost of the DC-DC converter using a new Switching Noise Robust Charge-pump (SNRC). A boost DC-DC converter with the proposed SCC and SNRC was designed and fabricated in a commercial 0.35 mu m BCDMOS process with total controller area of 0.791 mm(2). A maximum efficiency of 90% was achieved at a total output power of 480 mW with a switching frequency of 926 kHz when the input and the output voltages were 3.7 V and 8 V, respectively. Over 85% efficiency was maintained over a wide range of output load current from 40 mA to 300 mA.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2014-02
Language
English
Article Type
Article
Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.49, no.2, pp.502 - 512

ISSN
0018-9200
DOI
10.1109/JSSC.2013.2293629
URI
http://hdl.handle.net/10203/190174
Appears in Collection
EE-Journal Papers(저널논문)
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