Selective Search Area Reuse Algorithm for Low External Memory Access Motion Estimation

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In motion estimation for video codec, reducing the amount of external memory access is critical to reduce power consumption and to minimize performance degradation. Previous search area reuse algorithms to reduce the memory access still suffer from coding efficiency degradation in fast motion video. Previously, we proposed a selective search area reuse (SSAR) algorithm to reduce the amount of external memory access with minimal coding efficiency degradation. In this letter, we extend SSAR algorithm to multiple reference frame motion estimation with a method to utilize multiple on-chip memories. Then, we propose a frame-level dynamic search range algorithm based on the SSAR algorithm. Finally, we propose a memory usage switching method to increase the utilization of the limited-size on-chip memory. Experimental results show that the proposed algorithm with a search range of 16 achieves 28.64-56.24% reduction according to the number of on-chip memories in multiple reference frames. In the results of the Foreman video sequence, our algorithm operating with a fixed-size on-chip memory compensated for quality degradation by up to 2.7 dB in the frames of fast camera motion, and reduced the amount of memory access by 22.6% with a peak signal-to-noise ratio gain of 1 dB in the frames of camera shaking.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2009-07
Language
English
Article Type
Article
Keywords

H.264/AVC; ARCHITECTURE; ENCODER; DESIGN

Citation

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, v.19, pp.1044 - 1050

ISSN
1051-8215
DOI
10.1109/TCSVT.2009.2022704
URI
http://hdl.handle.net/10203/174448
Appears in Collection
EE-Journal Papers(저널논문)
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