DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Woo-Jin | ko |
dc.contributor.author | Kim, Jae-Min | ko |
dc.contributor.author | Ryu, Chung-Hyun | ko |
dc.contributor.author | Park, Jong-Bae | ko |
dc.contributor.author | Kim, Jun-Chul | ko |
dc.contributor.author | Kim, Joung-Ho | ko |
dc.date.accessioned | 2010-03-05T01:34:18Z | - |
dc.date.available | 2010-03-05T01:34:18Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2009-08 | - |
dc.identifier.citation | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.19, pp.512 - 514 | - |
dc.identifier.issn | 1531-1309 | - |
dc.identifier.uri | http://hdl.handle.net/10203/16964 | - |
dc.description.abstract | In this paper, we propose a new three-dimensional (3-D) clock distribution network (CDN) scheme using a low temperature co-fired ceramic (LTCC) package level interposer with a planar cavity resonator to achieve extremely low jitter and skew clock delivery even in severe power supply noise environments, especially for digital chips in 3-D stacked chip packages. It is based on a uniform-phase of the standing wave at the quarter-wavelength planar cavity resonator embedded inside the LTCC interposer. Substantial suppression of the timing jitter and skew was successfully demonstrated through a series of design, fabrication, and measurement processes of test devices and packages. | - |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | A 3-D Low Jitter and Skew Clock Distribution Network Scheme Using LTCC Package Level Interposer With a Planar Cavity Resonator | - |
dc.type | Article | - |
dc.identifier.wosid | 000268823500010 | - |
dc.identifier.scopusid | 2-s2.0-69249203456 | - |
dc.type.rims | ART | - |
dc.citation.volume | 19 | - |
dc.citation.beginningpage | 512 | - |
dc.citation.endingpage | 514 | - |
dc.citation.publicationname | IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | - |
dc.identifier.doi | 10.1109/LMWC.2009.2024841 | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Kim, Joung-Ho | - |
dc.contributor.nonIdAuthor | Ryu, Chung-Hyun | - |
dc.contributor.nonIdAuthor | Kim, Jun-Chul | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Clock distribution | - |
dc.subject.keywordAuthor | interposer | - |
dc.subject.keywordAuthor | jitter | - |
dc.subject.keywordAuthor | quarter-wavelength resonance | - |
dc.subject.keywordAuthor | skew | - |
dc.subject.keywordAuthor | 3-D stacked chip package | - |
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