A 3-D Low Jitter and Skew Clock Distribution Network Scheme Using LTCC Package Level Interposer With a Planar Cavity Resonator

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dc.contributor.authorLee, Woo-Jinko
dc.contributor.authorKim, Jae-Minko
dc.contributor.authorRyu, Chung-Hyunko
dc.contributor.authorPark, Jong-Baeko
dc.contributor.authorKim, Jun-Chulko
dc.contributor.authorKim, Joung-Hoko
dc.date.accessioned2010-03-05T01:34:18Z-
dc.date.available2010-03-05T01:34:18Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2009-08-
dc.identifier.citationIEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.19, pp.512 - 514-
dc.identifier.issn1531-1309-
dc.identifier.urihttp://hdl.handle.net/10203/16964-
dc.description.abstractIn this paper, we propose a new three-dimensional (3-D) clock distribution network (CDN) scheme using a low temperature co-fired ceramic (LTCC) package level interposer with a planar cavity resonator to achieve extremely low jitter and skew clock delivery even in severe power supply noise environments, especially for digital chips in 3-D stacked chip packages. It is based on a uniform-phase of the standing wave at the quarter-wavelength planar cavity resonator embedded inside the LTCC interposer. Substantial suppression of the timing jitter and skew was successfully demonstrated through a series of design, fabrication, and measurement processes of test devices and packages.-
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleA 3-D Low Jitter and Skew Clock Distribution Network Scheme Using LTCC Package Level Interposer With a Planar Cavity Resonator-
dc.typeArticle-
dc.identifier.wosid000268823500010-
dc.identifier.scopusid2-s2.0-69249203456-
dc.type.rimsART-
dc.citation.volume19-
dc.citation.beginningpage512-
dc.citation.endingpage514-
dc.citation.publicationnameIEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS-
dc.identifier.doi10.1109/LMWC.2009.2024841-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorKim, Joung-Ho-
dc.contributor.nonIdAuthorRyu, Chung-Hyun-
dc.contributor.nonIdAuthorKim, Jun-Chul-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorClock distribution-
dc.subject.keywordAuthorinterposer-
dc.subject.keywordAuthorjitter-
dc.subject.keywordAuthorquarter-wavelength resonance-
dc.subject.keywordAuthorskew-
dc.subject.keywordAuthor3-D stacked chip package-
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