3D-stacked L2 Cache Configuration for DVFS-enabled Processor to Minimize Overall Energy Consumption

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Publisher
International Conference on Convergence and Hybrid Information Technology(ICHIT)
Issue Date
2010
Language
ENG
Citation

International Conference on Convergence and Hybrid Information Technology(ICHIT)

URI
http://hdl.handle.net/10203/166494
Appears in Collection
EE-Conference Papers(학술회의논문)
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