DSpace at KOASAS: 3D-stacked L2 Cache Configuration for DVFS-enabled Processor to Minimize Overall Energy Consumption

DSpace at KOASAS

College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

3D-stacked L2 Cache Configuration for DVFS-enabled Processor to Minimize Overall Energy Consumption

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Kyung, Chong-Min researcher

Publisher: International Conference on Convergence and Hybrid Information Technology(ICHIT)

Issue Date: 2010

Language: ENG

Citation: International Conference on Convergence and Hybrid Information Technology(ICHIT)

URI: http://hdl.handle.net/10203/166494

Appears in Collection: EE-Conference Papers(학술회의논문)

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Knowledge Service Development Team, KAIST 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Republic of Korea. T. 82-42-350-4493 Email. koasas@kaist.ac.kr
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3D-stacked L2 Cache Configuration for DVFS-enabled Processor to Minimize Overall Energy Consumption

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