Thermal-aware energy minimization of 3D-stacked L3 cache with error rate limitation
- Publisher
- IEEE
- Issue Date
- 2011-05-15
- Language
- English
- Citation
2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011, pp.1672 - 1675
- ISSN
- 0271-4310
- Appears in Collection
- EE-Conference Papers(학술회의논문)
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- There are no files associated with this item.
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