A simple flash memory cell model for transient circuit simulation

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A simple Flash memory cell model for circuit simulation is presented. The proposed model gives an excellent fitting of do and transient data and does not require additional simulation time comparing with that of a MOSFET transistor. Effective control-gate voltage method and ideal current-mirror technique are introduced to calculate floating-gate voltage. These allow macro modeling of a Flash memory cell in a circuit simulator.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2005-08
Language
ENG
Article Type
Article
Keywords

CAPACITIVE COUPLING-COEFFICIENTS

Citation

IEEE ELECTRON DEVICE LETTERS, v.26, no.8, pp.563 - 565

ISSN
0741-3106
DOI
10.1109/LED.2005.852525
URI
http://hdl.handle.net/10203/1570
Appears in Collection
EE-Journal Papers(저널논문)
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