Block-matching criterion for efficient VLSI implementation of motion estimation

A new block-matching motion estimation criterion is presented, which can be implemented in VLSI more efficiently than the conventional criterion. The proposed scheme can reduce the amount of hardware required and increase the speed of computation in a VLSI chip with acceptable video performance. Video performance and VLSI implementation using the proposed criterion are presented.
Publisher
IEE-INST ELEC ENG
Issue Date
1996-06
Language
ENG
Citation

ELECTRONICS LETTERS, v.32, no.13, pp.1184 - 1185

ISSN
0013-5194
DOI
10.1049/el:19960766
URI
http://hdl.handle.net/10203/14652
Appears in Collection
CS-Journal Papers(저널논문)
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